1. Field of the Invention
This invention relates to semiconductor memory devices, and more particularly to a high speed programmable read only memory (PROM) device.
2. Description of the Prior Art
Semiconductor programmable read only memories (PROMs) are well-known in the prior art. A PROM consist of an array of memory cells, each cell in which may be programmed to store a binary "0" or "1" (a so-called binary "bit") after the PROM has been completely fabricated and assembled. Once an individual cell is programmed, it may not later be changed or "reprogrammed".
One common method of constructing PROMs is to use a bipolar transistor as the programming means. Such a bipolar transistor is shown in cross-section in FIG. 1a. Transistor 9 includes collector 13 formed in the semiconductor substrate using an impurity of a first conductivity type, base 12 formed in the collector 13 using an impurity of a conductivity type opposite to that of collector 13, and emitter 11, formed in base 12 using an impurity the same conductivity type as, but of a higher concentration than in collector 13. In this fashion, either an NPN or a PNP transistor is formed. In order to program this type of cell to represent a first binary state such as a "1" or "0" (the unprogrammed cell represents the other state), sufficient emitter-collector current must be applied to form an electrical short (i.e., a low resistance path) between emitter 11 and collector 13 through base 12. This short is shown in FIG. 1b and is labeled 14. Typical emitter-collector currents required to form short 14 depend upon a number of factors (such as base doping concentration and base width) and are in the range of 70 to 150 milliamps. It is therefore generally recommended by manufacturers of such PROMs that a programming current on the order of 200 milliamps be used, in order to ensure that desired shorts are formed in selected cells, thereby programming these cells. Due to the high programming current required, access devices associated with the programming means of each cell must be capable of handling such currents without themselves being physically damaged. For this reason, bipolar transistors, which have high current carrying ability, are used as access devices in prior art PROM devices.
FIG. 2 shows a schematic diagram of a portion of a prior art PROM device utilizing bipolar transistors as the programming means. PROM device 100 contains bit lines B.sub.1 and B.sub.2, and word lines W.sub.1 and W.sub.2. The cell accessed by word line W.sub.1 and bit line B.sub.1 is labeled 11. The cell accessed by word line W.sub.1 and bit line B.sub.2 is labeled 12. Similarly, the cell accessed by word line W.sub.2 and bit line B.sub.1 is labeled 21, and the cell accessed by word line W.sub.2 and bit line B.sub.2 is labeled 22. Each cell is similarly constructed, and thus the following discussion of cell 11 applies equally to all cells in the memory array 100.
Memory cell 11 comprises access transistor T.sub.11 having collector 1, base 2, and emitter 3. Collector 1 is connected to bit line B.sub.1, and base 2 is connected to word line W.sub.1. Emitter 3 is connected to collector 4 of programming transistor P.sub.11 as shown. P.sub.11 is the transistor which is to be programmed to reflect the state of the cell to which it is a party. Base 5 of programming transistor P.sub.11 is floating, and emitter 6 is connected to bias line 91. Connected to bit line B.sub.1 is sense amplifier A.sub.1 having output terminal O.sub.1.
During the programming of memory cell 11, a short is created between collector 4 and emitter 6 of programming transistor P.sub.11 in the following manner. Bias line 91 is connected to ground. All other bit lines at this time are kept low. Word line W.sub.1 is accessed by applying to it a logical high sufficient to forward bias the base-emitter junction of transistor T.sub.11. All other word lines are kept low at this time. Bit line B.sub.1 is connected to a source of high positive potential sufficient to cause enough current to flow through transistor P.sub.11 to short the collector-emitter junction of transistor P.sub.11. With a high on word line W.sub.1, access transistor T.sub.11 turns on. The source of high potential connected to bit line B.sub.1 is connected to collector 4 of programming transistor P.sub.11 through access transistor T.sub.11. Programming transistor P.sub.11 conducts, due to the high potential connected to its collector 4, a current sufficient to cause reverse breakdown of its collector-base junction. With emitter 6 being connected to bias line 91, which is at ground, the base-emitter junction is forward biased. Programming transistor P.sub.11 is constructed such that sufficient current is applied during programming from bit line B.sub.1 to cause a permanent short to be created between collector 4 and emitter 6. Access transistor T.sub.11 is constructed such that it can carry this programming current without itself becoming damaged. Because access transistor T.sub.11 is rather large, the speed of cell 11 is rather low. Each cell in memory array 100 which is to be programmed is programmed by this method.
During the read operation of memory cell 11, bias line 91 is connected to ground, bit line B.sub.1 is accessed by applying to it a logical high (i.e. a positive voltage sufficient to allow reading of cell 11, but insufficient to generate enough current through transistor P.sub.11 to short the collector-emitter junction of transistor P.sub.11), and word line W.sub.1 is accessed by applying to it a logical high sufficient to forward bias the base-emitter junction of transistor T.sub.11. With bit line B.sub.1 and word line W.sub.1 high, access transistor T.sub.11 will conduct, applying the logical high from bit line B.sub.1 to collector 4 of programming transistor P.sub.11. If programming transistor P.sub.11 has been programmed, the high applied to collector 4 will cause current to flow through the short created between collector 4 and emitter 6 of programming transistor P.sub.11 to bias lead 91, which is at ground. The current flow through access transistor T.sub.11 and programming transistor P.sub.11 to ground causes bit line B.sub.1 to be pulled low. This low is applied to sense amplifier A.sub.1, resulting in an output signal being applied to output terminal O.sub.1 indicative of the fact that programming transistor P.sub.11 has been programmed (i.e. has a short circuit). On the other hand, if programming transistor P.sub.11 had not been programmed, current would not flow between collector 4 and emitter 6 of programming transistor P.sub.11, because base 5 is not high. Thus, when an unprogrammed cell 11 is accessed, bit line B.sub.1 will remain high. This high is applied to amplifier A.sub.1, and the output signal available at O.sub.1 is indicative of memory cell 11 being unprogrammed.
A major difficulty associated with this prior art method of utilizing bipolar transistors as programming means is that each access transistor associated with a single programming transistor must be capable of carrying the high programming current without itself being damaged. Since the current required to program a bipolar transistor is on the order of 200 milliamps, the access transistor of prior art PROMs must be constructed to be rather large in order to be able to handle 200 milliamps without incurring any damage when the memory cell is programmed by fusing a transistor junction. Because of the required large size of the access transistors of such prior art PROMs, the speed of such prior art PROMs is rather low.
Another prior art method of constructing PROMs is to utilize refractory metal, such as nichrome, titanium-tungsten, or polycrystalline silicon, in such a manner as to form a fusible link. Such a fusible link is shown in FIGS. 3a and 3b. Fusible link 71 contains narrow region 72 such that region 72 acts as a fuse. When sufficient current is caused to flow through narrowing 72, the material is melted, thus forming opening 73 as shown in FIG. 3b. The circuit of FIG. 2 can be used to construct a PROM utilizing fusible links, where each programming transistor P.sub.11, P.sub.12, P.sub.21, and P.sub.22 is replaced by a single fusible link. Programming and reading takes place in precisely the same manner as in the circuit shown in FIG. 2, with the exception that programmed cells contain open fuses rather than shorted transistors. Typical current required to blow open a fusible link is again on the order of 70 to 200 milliamps. Thus, this technique also requires that each access transistor be rather large in order to carry the current required to program each fusible link without itself incurring any damage; the speed of such prior art PROM devices utilizing fusible links is rather slow.
Prior art PROMs are disclosed, for example, in U.S. Pat. Nos. 3,191,151; 3,733,690; 3,742,592 and 3,848,238.